Types of power consumption

There are basically two types of power consumption.

1. Dynamic

• Dynamic power is consumed during switching of transistors , And hence it depends on clock frequency and switching activity.  
• Dynamic power has two components. 
• Switching power
• This is the power that requires to charge and discharge capacitive load during logic transition from 1 to 0 and vice-versa.
• Internal power
• This is the power that consumed during transition . i.e. A point where both NMOS and PMOS are ON . Which is called as crowbar current.

2. Static

• Static power is transistor leakage current that flows when we apply power to a device.
• Main causes of static power consumption are as below.
• Reverse bias p-n junction leakage diode.
• sub-threshold leakage.
• Gate leakage.

Different power consumption reduction techniques

Different types of strategies used to reduce power consumption. Some of them are listed as below.

1. Clock gating

• It is a technique through which clock signal is changed to a value such that there is no requirement of evaluating registers whose value is not supposed to be changed for specific time interval. This will ensure that there is no switching activity due to change in clock and hence reduction in dynamic power consumption.

2. Power gating

• Power gating is a technique to shut down the power of a block when it is not required to be On. i.e In Mobile voice processing block can be shutdown when user is not having incoming or outgoing call . This is the best method of reducing power consumption. 

3. Multiple Vt Library cells

• Nowadays user provides same cells with two different threshold voltage in library. So that synthesis tool can choose cell depending on requirement. With low Vt , sub-threshold leakage will increase but speed will also be higher. So for timing critical path synthesis tool will insert low Vt cells and at other path high Vt cell .

4. Dynamic voltage and frequency scaling

• In this technique same block can be working at different voltage at different time .i.e some time it is required to do high computation (complex equation solver) task then it needs more speed so it can operate at high voltage . While some time low computation is required so it can operate at lower voltage.

5. Supply voltage reduction

• As power is directly proportional to voltage (p =iv ) , with reduction in voltage ,power consumption will reduce. But again with reduction in voltage will reduce switching speed as well. 

6. Multi voltage design

• In SOC some block ( RAM) are such which requires higher speed , so that block can be powered with higher voltage . While some block (Peripheral device) which does not needs high speed so that block can be powered with lower voltage , which in turn can reduce leakage power . In earlier days people used to have same voltage for whole design which makes it necessary to operate it high voltage . While this new technique we can achieve leakage reduction.