UPF LRM has below commands for creating logic port/net and connect them . Question comes to user that what is the use of creating logic(design) port/net through UPF command.
cretae_logic_port
create_logic_net
connect_logic_net
Generally this is mainly used for creating control port/net used in the other UPF commands.
Let us take one example for isolation.
At RTL level let's say user is writing a isolation strategy in his UPF. Now user does not have the isolation control signal defined in the design . So in alternative way he can define isolation control signal using cretae_logic_net command and then use it as isolation signal in isolation strategy. So at the time of Netlist creation , Synthesis tool will create a port/net in actual design with the same name.
This way user can avoid defining UPF control signals in design at RTL level.
RTL:
module dut (in1,in2,out);
input in1,in2;
output out;
assign out = in1 & in2;
endmodule
UPF:
create_power_domain TOP
create_logic_port iso_en
create_logic_net iso_en
connect_logic_net iso_en -ports iso_en
set_isolation iso_1 -domain TOP -clamp_value 0
set_isolation_control iso_1 -domain TOP -isolation_signal {iso_en} -isolation_sense low -location self
Netlist :
module dut (in1,in2,out,iso_en);
input in1,in2;
input iso_en;
output out;
AND (in1,in2,w1);
ISO (w1,iso_en,out1) ;
endmodule
cretae_logic_port
create_logic_net
connect_logic_net
Generally this is mainly used for creating control port/net used in the other UPF commands.
Let us take one example for isolation.
At RTL level let's say user is writing a isolation strategy in his UPF. Now user does not have the isolation control signal defined in the design . So in alternative way he can define isolation control signal using cretae_logic_net command and then use it as isolation signal in isolation strategy. So at the time of Netlist creation , Synthesis tool will create a port/net in actual design with the same name.
This way user can avoid defining UPF control signals in design at RTL level.
RTL:
module dut (in1,in2,out);
input in1,in2;
output out;
assign out = in1 & in2;
endmodule
UPF:
create_power_domain TOP
create_logic_port iso_en
create_logic_net iso_en
connect_logic_net iso_en -ports iso_en
set_isolation iso_1 -domain TOP -clamp_value 0
set_isolation_control iso_1 -domain TOP -isolation_signal {iso_en} -isolation_sense low -location self
Netlist :
module dut (in1,in2,out,iso_en);
input in1,in2;
input iso_en;
output out;
AND (in1,in2,w1);
ISO (w1,iso_en,out1) ;
endmodule
Say this was your lower level upf file. How do you instantiate it in a parent upf and make connections to this control port, so that parent can associate an AON supply_net to the control port.
ReplyDeleteYou can follow the same method. You need to connect iso_en of this lower level upf to the one you have created in your top level upf using connect_logic_net command.
ReplyDeleteHow to drive iso_en? Can it be driven from a testbench?
ReplyDelete