Depending on how the retained value is stored and retrieved/restored , there are at least two flavors of retention registers, as follows:
1) Balloon-style retention: In a balloon-style retention register, the retained value is held in an
additional latch, often called the balloon latch. In this case, the balloon element is not in the
functional data-path of the register.
2) Master/slave-alive retention: In a master/slave-alive retention register, the retained value is held in the master or slave latch. In this case, the retention element is in the functional data-path of the
register.
- Ballon-style retention can be Dual-Pin Retention cell or Single-Pin Retention cell.
- Master/slave-alive retention is same as Zero-Pin Retention cell.
Dual-Pin Retention :
- Dual-Pin Retention is the one which has two separate control signal for save and restore operation.
- Save operation can be level-sensitive or edge-sensitive.
Single-Pin Retention:
- Single-Pin Retention is the one which has single control signal for both save and restore operation.
- Save operation can be level-sensitive or edge-sensitive.
- Save operation and Restore operation will be on opposite level/edge of control signal. i.e If save is performed on level high than restore will be performed on level low of control signal.
Zero-Pin Retention:
- Zero-Pin Retention is the one which does not have any control signal .
- Save operation will be performed when the power domain in which cell is sitting goes from NORMAL to CORRUPT state.
- Restore operation will be performed when the power domain in which cell is sitting goes from CORRUPT to NORMAL state.
Well described about the type of retention cell.
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DeleteGood description. Thanks for sharing
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DeleteHi Ravin, I have one question, how restore signal is interpreted in modelling, can we consider it synchronous signal??
ReplyDeleteHi Varun , Retention should be synchronous to clock since we restore once power is up amd clock is in place .
DeleteHi. Is there any text which can be read as a prerequisite to understand this concept better ? What are the pros and cons of 0-pin retention registers and in which design would I prefer using these ?
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